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HCS157MS
September 1995
Radiation Hardened Quad 2-Input Multiplexers
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C TOP VIEW
S1 1I0 2 1I1 3 1Y 4 2I0 5 2I1 6 2Y 7 GND 8 16 VCC 15 E 14 4I0 13 4I1 12 4Y 11 3I0 10 3I1 9 3Y
Features
* 3 Micron Radiation Hardened CMOS SOS * Total Dose 200K RAD (Si) * SEP Effective LET No Upsets: >100 MEV-cm2/mg * Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day (Typ) * Dose Rate Survivability: >1 x 1012 RAD (Si)/s * Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse * Latch-Up Free Under Any Conditions * Military Temperature Range: -55oC to +125oC * Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V * Input Logic Levels - VIL = 30% of VCC Max - VIH = 70% of VCC Min * Input Current Levels Ii 5A at VOL, VOH
Description
The Intersil HCS157MS is a Radiation Hardened quad 2-input multiplexers which select four bits of data from two sources under the control of a common select input (S). The Enable input (E NOT) is active low. When the enable pin is high all of the outputs (1Y-4Y) are forced low regardless of all other input conditions. Moving data from two groups of registers to four common output busses is a common use of these devices. The state of the Select input determines the particular register from which the data comes. They can also be used as function generators. The HCS157MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS157MS is supplied in a 16 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
S 1I0 1I1 1Y 2I0 2I1 2Y GND
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C TOP VIEW
1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC E 4I0 4I1 4Y 3I0 3I1 3Y
Ordering Information
PART NUMBER HCS157DMSR HCS157KMSR HCS157D/Sample HCS157K/Sample HCS157HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 16 Lead SBDIP 16 Lead Ceramic Flatpack 16 Lead SBDIP 16 Lead Ceramic Flatpack Die DB NA
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
Spec Number File Number
173
518833 3561.1
HCS157MS Functional Block Diagram
S 1
E
15
4I1
13 12 14 10 11 6 5 3 2 3 CIRCUITS IDENTICAL TO CIRCUIT IN ABOVE DASHED OUTLINE 7 4 2Y 1Y 9 3Y 4Y
4I0
3I1 3I0 2I1 2I0 1I1 1I0
TRUTH TABLE SELECT INPUTS S X L L H H I0 X L H X X
ENABLE E H L L L L H = High Level L = Low Level X = Immaterial
DATA INPUTS I1 X X X L H
OUTPUT Y L L H L H
Spec Number 174
518833
Specifications HCS157MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 73oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 114oC/W 29oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.44W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.7mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.8mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation.
Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at 4.5V VCC (TR, TF) . . . . . . .100ns Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . VCC to 70% of VCC Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . . .0V to 30% of VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V, (Note 2) VCC = 4.5V, VIH = 4.5V, VOUT = VCC - 0.4V, VIL = 0V, (Note 2) VCC = 4.5V, VIH = 3.15V, IOL = 50A, VIL = 1.35V VCC = 5.5V, VIH = 3.85V, IOL = 50A, VIL = 1.65V Output Voltage High VOH VCC = 4.5V, VIH = 3.15V, IOH = -50A, VIL = 1.35V VCC = 5.5V, VIH = 3.85V, IOH = -50A, VIL = 1.65V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 7.2 6.0 -7.2 -6.0 MAX 40 750 0.1 UNITS A A mA mA mA mA V
PARAMETER Supply Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND
Output Current (Source)
IOH
Output Voltage Low
VOL
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1 VCC -0.1 -
-
V
1, 2, 3
+25oC, +125oC, -55oC
-
V
1 2, 3
+25oC +125oC, -55oC +25oC, +125oC, -55oC
0.5 5.0 -
A A -
Noise Immunity Functional Test NOTES:
FN
VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, (Note 3)
7, 8A, 8B
1. All voltages referenced to device GND. 2. Force/Measure functions may be interchanged. 3. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 175
518833
Specifications HCS157MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 TPLH VCC = 4.5V 9 10, 11 Propagation Delay Enable to Output TPHL VCC = 4.5V 9 10, 11 TPLH VCC = 4.5V 9 10, 11 Propagation Delay Select to Output TPHL VCC = 4.5V 9 10, 11 TPLH VCC = 4.5V 9 10, 11 NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 2 2 2 2 2 2 2 2 2 2 2 2 MAX 26 30 20 24 22 25 22 25 31 37 25 29 UNITS ns ns ns ns ns ns ns ns ns ns ns ns
PARAMETER Propagation Delay Data to Output
SYMBOL TPHL
(NOTES 1, 2) CONDITIONS VCC = 4.5V
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation SYMBOL CPD CONDITIONS VCC = 5.0V, VIH = 5.0V, VIL = 0V, f = 1MHz NOTES 1 1 Input Capacitance CIN VCC = 5.0V, VIH = 5.0V, VIL = 0V, f = 1MHz 1 1 Output Transition Time TTHL, TTLH VCC = 4.5V VIH = 4.5V, VIL = 0V, 1 1 NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC MIN MAX 68 84 10 10 15 22 UNITS pF pF pF pF ns ns
Spec Number 176
518833
Specifications HCS157MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER Supply Current Output Current (Sink) SYMBOL ICC IOL (NOTES 1, 2) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V VCC = 4.5V , VIH = 3.15, VIL = 1.35V, IOL = 50A VCC = 5.5V, VIH = 3.85, VIL =1.65V, IOL = 50A Output Voltage High VOH VCC = 4.5V, VIH = 3.15, VIL = 1.35V, IOH = -50A VCC = 5.5V, VIH = 3.85, VIL = 1.65V, IOH = -50A Input Leakage Current Noise Immunity Functional Test Propagation Delay Data to Output IIN FN VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIH = 3.15V, VIL = 1.35V, (Note 3) VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V VCC = 4.5V TEMPERATURE +25oC +25oC MIN 6.0 MAX 0.75 UNITS mA mA
Output Current (Source) Output Voltage Low
IOH
+25oC
-6.0
-
mA
VOL
+25oC
-
0.1
V
+25oC
-
0.1
V
+25oC
VCC -0.1 VCC -0.1 -
-
V
+25oC
-
V
+25oC +25oC
5 -
A -
TPHL TPLH
+25oC +25oC +25oC +25oC +25oC +25oC
2 2 2 2 2 2
30 24 25 25 37 29
ns ns ns ns ns ns
Propagation Delay Enable to Output
TPHL TPLH
Propagation Delay Select to Output
TPHL TPLH
NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC. 3. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) PARAMETER ICC IOL/IOH GROUP B SUBGROUP 5 5 DELTA LIMIT 12A -15% of 0 Hour
Spec Number 177
518833
Specifications HCS157MS
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 Subgroup B-6 Group D NOTE: 1. Alternate Group A testing in accordance with Method 5005 of MIL-STD-883 may be exercised. METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 Sample/5005 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 7, 9 Subgroups 1, 2, 3, 9, 10, 11 ICC, IOL/H, IOZL/H READ AND RECORD ICC, IOL/H, IOZL/H ICC, IOL/H, IOZL/H ICC, IOL/H, IOZL/H
TABLE 7. TOTAL DOSE IRRADIATION CONFORMANCE GROUPS Group E Subgroup 2 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. TEST METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
TABLE 8. STATIC BURN-IN AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1) 4, 7, 9, 12 1 - 3, 5, 6, 8, 10, 11, 13 - 15 16 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 4, 7, 9, 12 8 1 - 3, 5, 6, 10, 11, 13 - 16 -
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) NOTES: 1. Each pin except VCC and GND will have a resistor of 10K 5% for static burn-in. 2. Each pin except VCC and GND will have a resistor of 680 5% for dynamic burn-in. 8, 15 4, 7, 9, 12 16 2, 3, 5, 6, 10, 11, 13, 14 1
TABLE 9. IRRADIATION TEST CONNECTIONS OPEN 4, 7, 9, 12 GROUND 8 VCC = 5V 0.5V 1, 2, 3, 5, 6, 10, 11, 13 - 16
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 178
518833
HCS157MS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
Spec Number 179
518833
HCS157MS Propagation Delay Timing Diagram and Load Circuit
VIH VS VSS TPLH TPHL VOH VS VOL OUTPUT INPUT VOL
Transition Timing Diagram
VOH TTLH 80% 20% 80% 20% TTHL
OUTPUT
VOLTAGE LEVELS PARAMETER VCC VIH VS HCS 4.50 4.50 2.25 0 0 UNITS V V V V V
DUT
TEST POINT
VIL GND
CL
RL
CL = 50pF RL = 500
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 180
518833
HCS157MS Die Characteristics
DIE DIMENSIONS: 84 x 84 mils METALLIZATION: Type: SiAl Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: <2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 mils x 4 mils
Metallization Mask Layout
HCS157MS
(16) VCC (2) 1I0 (15) E
1I1 (3)
(1) S
(14) 4I0
(13) 4I1 1Y (4)
(12) 4Y
2I0 (5)
(11) 3I0
2I1 (6) (10) 3I1
2Y (7)
NOTE: The die diagram is a generic plot from a similar HCS device. It is intended to indicate approximate die size and bond pad location. The mask series for the HCS157 is TA14371A.
GND (8)
3Y (9)
Spec Number 181
518833

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